eprint.iacr.orgpaperA methodology to derive security specifications for complex electronic systems
Paper proposing a risk-based methodology to derive security specifications for complex electronic systems such as AI chips and chiplet-based designs. It walks from system missions to assets, threat analysis, security requirements and then countermeasure selection. The method is illustrated on datacenter and automotive chiplets for the missions of secure provisioning, trimming, debugging, booting and remote attestation, and addresses the longer supply chain and multi-tenant threats that chiplets introduce.
TL;DR Risk-based method (missions → assets → threats → requirements → countermeasures) applied to datacenter and automotive chiplet security: provisioning, debug, boot, attestation.
Organisations named here
- IEEE ICDV 2026
- Sylvain Guilley
Technologies named here
- Datacenter chiplets
- Automotive chiplets
- Chiplet-based complex electronic systems
Techniques named here
- Missions analyzed
- Side-channel attack mitigations and evaluation metrics
Related in Hardware & RF
eprint.iacr.orgpaperHAETAE on a Diet: Less Stack, Less Time on Low-End Microcontrollers
github.comrepogeo-tp/ESP32-Bit-Pirate
github.comrepo