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Staggered Instruction-Fetch Duplication: A Lightweight Processor-Level Countermeasure Against Fault Injection
eprint.iacr.orgpaper

Staggered Instruction-Fetch Duplication: A Lightweight Processor-Level Countermeasure Against Fault Injection

Proposes Staggered Instruction-Fetch Duplication (SIFD), a processor-level fault-injection countermeasure that fetches each instruction twice in consecutive cycles while fetching two different instructions per cycle, so inconsistent fetches are detected without full processor duplication, compiler support or crypto hardware. Implemented on a custom RV32I core on an Artix-7 FPGA, it costs 15.0% more slices and 16.3% more execution time. Attack success falls from 0.86% to below 0.01% under clock fault injection and from 0.32% to 0.13% under EMFI, with 73.18% of CFI and 11.44% of EMFI attempts detected.

TL;DR SIFD: lightweight instruction-fetch duplication on an RV32I FPGA core that cuts clock-glitch attack success to below 0.01% and detects 73% of CFI attempts, with weaker gains under EMFI.
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Organisations named here

  • SIFD
  • Staggered Instruction-Fetch Duplication

Technologies named here

  • Clock fault injection
  • Custom RV32I processor implemented on an Artix-7 FPGA
  • Electromagnetic fault injection
  • RISC-V
  • FPGA
  • Artix-7
  • RV32I

Techniques named here

  • Fault injection attacks
  • Clock fault injection
  • Electromagnetic fault injection

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