Exploit Reversing #10: iOS Security Research (Part 1)
First installment of a new iOS-focused arc in Alexandre Borges's "Exploit Reversing" series, detailing how to build a practical iOS vulnerability-research lab (Mac host, Apple Virtualization.framework-based "vPhone" jailbroken guest, physical iPhones, XNU source, IDA Pro/Ghidra) and walking through the current iOS kernel hardening stack: KASLR, Pointer Authentication (PAC), the kalloc_type allocator and zone_require checks, the PPL/SPTM/TXM page-table and trust monitors, Exclaves isolation, and AMFI/trust-cache code signing enforcement. It also references the public Titan PPL/SPTM bypass (A14–A17 devices, iOS 16.1–17.4 beta 3) as the state of the art for defeating these protections. Part of a long-running, actively published series on Windows, iOS, and hypervisor exploitation.
What it is
Alexandre Borges's "Exploit Reversing #10" (released Sep 30, 2026) is a primer on the current iOS kernel-exploitation attacker model, written for researchers deciding on lab infrastructure before diving into N-day/0-day work. Beyond what the summary already covers (lab setup, hardening stack list, Titan reference), the page gives concrete silicon/version boundaries for each protection layer and specifics on the Titan bypass mechanism that are worth capturing directly.
How it works
- SPTM/PPL split by silicon, not by iOS version alone: SPTM was introduced with iOS 17.0, natively anchored on A17 Pro and later (A18, M3+). The A17 Pro never ran legacy PPL at all. Older chips (A15, A16, M2) ran PPL through the iOS 16 era and transitioned to SPTM only when upgraded to iOS 17.
- TXM and SPTM are asymmetric: TXM (code-signing/entitlement trust, at GL0) is less privileged than SPTM (page-table ownership, at GL2) — compromising TXM does not imply an SPTM bypass.
- Titan bypass mechanism: it does not break GL2/SPTM directly. It gets code execution on the AGX coprocessor, bypasses "microPPL" there, then maps an AP kernel page table with a self-referencing entry — described as a lateral move through a peripheral trust domain, not a compromise of SPTM itself.
- kalloc_type + zone_require: segregates kernel heap allocations by struct type and asserts the allocating zone matches the dereferenced type, which together close off most heap-grooming/UAF/type-confusion strategies. Borges notes he personally hit this wall exploiting a namei-component vulnerability.
Preconditions / Affected
- Titan reaches iOS 17.3.1 on A14–A17 devices; nothing public defeats SPTM on iOS 17.4 or later at time of writing.
- Devices referenced in the author's lab: iPhone 12 (A14) and iPhone 16 (A18), running iOS 26.5/26.6 and iOS 27 beta builds.
What to do
Identify device pairing and build info during lab setup:
xcrun devicectl list devices
xcrun devicectl device info details --device <uuid> | -i "OS Build Update"Use this to confirm which protection generation (PPL vs. SPTM/TXM) a given test device falls under before planning an exploitation chain against it.
Caveats
The Titan bypass description is the author's own characterization of a third-party public bypass (https://github.com/alfiecg24/Titan), not something reproduced in this article — treat the GL2/microPPL distinction as Borges's framing, not verified first-hand testing.
Organisations named here
- Alexandre Borges
- Exclaves
- kalloc_type
- KIP
- KTRR
- PAC
- PPL
- SPTM
- TXM
Technologies named here
- IDA Pro / IDA Home
- iOS
- Ghidra
- Binary Ninja
- Hopper
- VirtualBuddy
- Apple Virtualization.framework
- iPhone 16
- ipsw framework
- iPhone 12
- idevicecrashreport
- macOS
- Apple Silicon
- xcrun devicectl
- XNU source repository
- Titan
- XNU kernel
- AMFI
- XNU
- IDA Pro
Techniques named here
- KASLR
- Pointer Authentication
- Data-only attack
- Heap grooming / memory type confusion exploitation
- PPL bypass via Titan
- Page table forgery
- Kernel read-write primitive escalation
Related in Mobile Security
thomasbuilds/Spectre
